A liquid crystal display device is a flat display device having excellent properties such as high definition, a flat shape, light weight, and low power consumption. Recently, due to an increase in display ability, an increase in production ability, and an increase in price competitiveness against other display devices, the market of the liquid crystal display device has spread rapidly.
If a current voltage continues to be applied to a liquid crystal layer of such liquid crystal display device for a long time, elements get deteriorated. Therefore, in order to secure a long life of such liquid crystal display device, it is necessary to perform alternating driving (inversion driving) in which the polarity of a voltage to be applied is inverted periodically. However, in a case where an active matrix liquid crystal display device employs frame inversion driving in which the polarity of a voltage is inverted with respect to each frame, it is inevitable that some unbalance is seen in a plus/minus voltage to be applied to liquid crystal due to anisotropy of liquid crystal dielectric constant, variation in pixel potential that is caused by parasitic capacitance between a gate and a source of a pixel TFT, and a slip of a center value of a counter electrode signal. Consequently, a minor variation in luminance occurs at a frequency that is a half of a frame frequency, making a user see flickers. In order to solve this problem, there is generally employed inversion driving in which pixel signals have opposite polarities between adjacent lines or adjacent pixels as well as voltages are inverted with respect to each frame.
When dot inversion in which the polarity of a voltage is inverted with respect to each pixel is performed, a charging rate of a pixel drops due to signal delay in a data signal line. In order to solve this problem, there is proposed a technique for inverting the polarity of a data signal voltage with respect to a plurality of horizontal periods (a plurality of rows). However, this technique still raises a problem that a charging rate of a pixel drops at a row where the polarity of a data signal voltage is inverted.
In order to solve this problem, Patent Literature 1 discloses a technique in which a dummy horizontal period is provided after inversion of the polarity of a data signal and gate-on pulses whose pulse width corresponds to a plurality of horizontal periods are applied to all scanning signal lines in such a manner that the gate-on pulses have the same pulse width. FIG. 92 is a voltage waveform chart showing driving by this technique. In FIG. 92, (2) represents a latch pulse LP1, (3) represents image data D to be latched by a signal-side drive circuit and output to a signal line SL with respect to each horizontal scanning period, (4) represents a polarity signal P of an image signal voltage, and (5)-(12) represent scanning signal voltages of individual scanning lines. This technique improves display unevenness due to the difference in a charging property.
Further, Patent Literature 2 discloses a technique in which the width of a gate-on pulse after inversion of the polarity of a data signal is made larger than the width of a gate-on pulse with no inversion of the polarity of a data signal so as to increase a charging rate of a first row where the polarity of the data signal is inverted. FIG. 93 is a voltage waveform chart showing driving by this technique. FIG. 93 shows gate signals at 4ith to [4(i+1)+1]th rows and a data signal.
Citation List
Patent Literature 1
Japanese Patent Application Publication, Tokukai, No. 2001-51252 A (Publication Date: Feb. 23, 2001)
Patent Literature 2
Japanese Patent Application Publication, Tokukai, No. 2003-66928 A (Publication Date: Mar. 5, 2003)